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Digital Logic Design

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2.5k
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Differentiate in brief between combination and sequential circuits.
digital logic design updated 7.4 years ago by teamques10 ★ 65k
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Draw and explain the working of 4-bit ring counter with timing diagram
digital logic design updated 7.4 years ago by teamques10 ★ 65k
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What is Modulus of the counter? For MOD-16 counter how many flip-flops are needed?
digital logic design updated 7.4 years ago by teamques10 ★ 65k
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Convert JK flip-flop into D-flip-flop and T-flip-flop(show only the design without steps).
digital logic design updated 7.4 years ago by teamques10 ★ 65k
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Explain the concept of comparator. Develop the truth table for 2-bit binary comparator & design it using a suitable decoder & additional gates.
digital logic design updated 7.4 years ago by teamques10 ★ 65k
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Short Note on: Johnson Ring Counter:
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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996
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State truth table of 3 bit Gray to Binary conversion then design it using 3:8 decoder and additional gates.
digital logic design updated 3.0 years ago by teamques10 ★ 65k
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8.2k
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Implement the following logic function using all 4:1 multiplexers with select inputs as 'B','C','D','E' only $F(A,B,C,D,E) = \sum m(0,1,2,3,6,8,9,10,13,15,17,20,24,30)$.
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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15k
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Design 1- bit comparator using logic Gate 5.
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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Design a 2-bit digital comparator that accepts inputs A and B and gives three outputs G,E and L. i) Output G, when A>B ii) Output E, when A=B iii) Output L, when A<B
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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65k
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What is shift register? Explain 4-bit Bi-directional shift register?
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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Explain 3 bit Bidirectional shift register using JK Flip Flop. Draw the neat waveforms.
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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Convert JK Flip flop to SR and D Flip Flop
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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Short Note on: - State Table
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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Short note on: Decade Counter.
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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Convert SR Flip Flop to T Flip flop
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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4.6k
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Short note on: Multi Vibrator
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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Explain Astable multivibrator using op-amp with neat waveforms.
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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2.3k
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Explain the concept of Bistable multivibrators.
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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31k
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Explain the Operation of 4-bit universal shift register.
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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Convert binary data 1010 into 7 bit even parity hamming code
digital logic design updated 7.4 years ago by teamques10 ★ 65k
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1.3k
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justify and simplify the expression
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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Desing a 4-bit input (A,B,C,D) digital circuit that will give at its output(x) at logic 1 if binary number formed at the input beween 2 and 9 (including)
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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What is multiplexer tree? Construct 32:1 multiplexer using 8:1 multiplexer only. Explain how the logic on particular data line is steered to the output in this design with example.
digital logic design updated 7.4 years ago by krrish • 350
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Details and comparison of FPGA and CPLD.
digital logic design updated 7.9 years ago by teamques10 ★ 65k
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